Validates public inputs for generated Verilator wrapper source construction.
This module owns the safe SystemVerilog top-module identifier subset used by
SvPortSim.Verilator.Wrapper. The accepted subset is intentionally narrow:
an ASCII letter or underscore followed by ASCII letters, digits, underscores,
or dollar signs.
Summary
Functions
Validates a top-module name for wrapper generation.
Returns whether top_module is accepted by the wrapper generator.