SvPortSim.Verilator.Wrapper.Accessor (SvPortSim v0.1.0)

Builds deterministic C++ accessor fragments for generated Verilator wrappers.

This module owns the conversion from SvPortSim.SignalSpec metadata to:

normalized signal metadata
JSON metadata embedded in the wrapper source
poke_signal/3 dispatch cases
peek_signal/2 dispatch cases
clock dispatch cases for tick and cycle

The generated fragments intentionally support only direct native C++ field access for top-level Verilated fields whose names are valid C++ identifiers and whose widths fit in a std::uint64_t value.

Summary

Functions

context(signal_specs)

Builds wrapper accessor generation context from signal specifications.

Types

context()

@type context() :: %{
  normalized_signal_specs: [SvPortSim.SignalSpec.t()],
  signal_specs_json: String.t(),
  poke_cases: String.t(),
  peek_cases: String.t(),
  clock_cases: String.t(),
  default_clock_case: String.t(),
  reset_cases: String.t(),
  default_reset_case: String.t()
}

Functions

context(signal_specs)

@spec context(term()) :: {:ok, context()} | {:error, {:invalid_signal_specs, term()}}

Builds wrapper accessor generation context from signal specifications.

signal_specs are normalized and validated through SvPortSim.SignalSpec. Validation failures are wrapped with {:invalid_signal_specs, reason} so the caller can surface the same error shape as SvPortSim.Verilator.Wrapper.