@spec aux_adc_width(operating_mode()) :: 8 | 10

Returns the bit width of the auxiliary ADC for the given operating mode.

Per datasheet §3.7, the auxiliary ADC is 8-bit when LPen=1 (low-power) and 10-bit otherwise — including in high-resolution mode, even though the accelerometer itself is 12-bit there.

@spec decode_ctrl_reg_1(<<_::8>>) :: %{lpen: boolean(), odr: odr(), axes: [axis()]}

Decode a CTRL_REG1 byte into a map of its fields.

Note that the LPen bit alone doesn't fully determine the operating mode — the HR bit in CTRL_REG4 is also needed. This function reports :lpen as a boolean; combine it with decode_ctrl_reg_4/1 to recover the full operating_mode/0.

@spec decode_ctrl_reg_2(<<_::8>>) :: %{
  mode: hpf_mode(),
  cutoff: hpf_cutoff(),
  filtered_data_output: boolean(),
  enable_for_click: boolean(),
  enable_for_interrupt_1: boolean(),
  enable_for_interrupt_2: boolean()
}

Decode a CTRL_REG2 byte into a map of its fields.

@spec decode_ctrl_reg_4(<<_::8>>) :: %{
  hr: boolean(),
  range: range(),
  block_data_update: bdu()
}

Decode a CTRL_REG4 byte into a map of its fields.

@spec encode_ctrl_reg_1(keyword()) :: <<_::8>>

Encode a CTRL_REG1 byte from keyword options.

Options

• :mode — operating_mode/0 (required). Sets the LPen bit.
• :odr — odr/0 (required).
• :axes — list of axis/0 to enable (default [:x, :y, :z]).

@spec encode_ctrl_reg_2(keyword()) :: <<_::8>>

Encode a CTRL_REG2 byte (high-pass filter configuration) from keyword options.

Options

• :mode — hpf_mode/0 (default :normal_with_reset).
• :cutoff — hpf_cutoff/0 (default 0). The actual −3 dB cutoff depends on ODR per the datasheet figures.
• :filtered_data_output (default false) — when true, the HPF output replaces the unfiltered data in OUT_* and the FIFO. When false (FDS=0) the HPF only affects the click / interrupt detectors.
• :enable_for_click (default false) — apply HPF to the click detector.
• :enable_for_interrupt_1 (default false) — apply HPF to inertial interrupt 1 (AOI 1).
• :enable_for_interrupt_2 (default false) — apply HPF to inertial interrupt 2 (AOI 2).

@spec encode_ctrl_reg_4(keyword()) :: <<_::8>>

Encode a CTRL_REG4 byte from keyword options. Leaves BLE, ST, and SIM at their reset values; callers that need to override them should compose the resulting binary with their own bit twiddling.

Options

• :mode — operating_mode/0 (required). Sets the HR bit.
• :range — range/0 (default 2).
• :block_data_update — bdu/0 (default :hold, recommended to avoid reading LSB/MSB pairs from different samples).

@spec native_width(operating_mode()) :: 8 | 10 | 12

Returns the native accelerometer ADC bit width for the given operating mode — equivalent to the right-shift required to recover the N-bit signed value from the 16-bit left-justified OUT_* registers.

@spec operating_mode(boolean(), boolean()) :: operating_mode()

Resolve the operating mode from the LPen and HR bits returned by decode_ctrl_reg_1/1 and decode_ctrl_reg_4/1.

Raises ArgumentError for the disallowed combination LPen=1, HR=1.

@spec self_test_code(self_test_mode()) :: 0..2

Encode a self-test mode atom to its 2-bit CTRL_REG4.ST code.

@spec sensitivity(operating_mode(), range()) :: pos_integer()

Returns the per-LSB sensitivity in milli-g at the native bit width for the given operating mode and range.