wasm_decode_simd (wasm v0.1.0)

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The 0xFD opcode space: fixed-width SIMD. Add a vector instruction here.

Split out of wasm_decode_code because it is larger than every other opcode prefix put together, roughly 240 instructions against the 17 behind 0xFC.

Only five immediate shapes exist across the whole space, so the table below is almost entirely Sub -> Atom and the shapes are named once each:

shapeinstructions
noneevery lane-wise arithmetic, comparison and bitwise operation
memargv128.load, v128.store, the splat and extend loads
memarg + lane indexv128.loadN_lane, v128.storeN_lane
lane indexextract_lane, replace_lane
16 bytesv128.const, i8x16.shuffle

v128.const and i8x16.shuffle both carry 16 raw bytes and are the only instructions in the format that do.

Summary

Functions

Decode one 0xFD-prefixed instruction, given the bytes after the prefix.

Functions

instr(R0)

-spec instr(binary()) -> {tuple() | atom(), binary()}.

Decode one 0xFD-prefixed instruction, given the bytes after the prefix.

Returns the instruction and the remaining input, or raises through wasm_error if the subopcode is not one the specification defines.