Benchmark Report: v0.1.1
View SourceThese are OTP host-side microbenchmarks. They are intended as reproducible baseline measurements, not ESP32 runtime performance guarantees.
Metadata
- Version: v0.1.1
- Commit: a2a7e78
- OTP version: 27
- OS: Debian 13 (Trixie)
- Architecture: x86_64
- CPU model: Intel(R) Pentium(R) Silver J5005 CPU @ 1.50GHz
- RAM: 16 GB (2x8 GB DDR4 @ 2400 MT/s)
Benchmark command
scripts/bench.sh
Results
Workload | Iterations | Total ms | Ops/sec
--------------------------|------------|----------|---------
decode_unsigned_small | 100000 | 220.4 | 453778
encode_unsigned_small | 100000 | 123.8 | 808041
decode_text_utf8 | 100000 | 164.2 | 609095
encode_text_utf8 | 100000 | 228.0 | 438667
decode_ble_map | 100000 | 372.4 | 268503
encode_ble_map | 100000 | 570.8 | 175177
decode_nested_map | 100000 | 289.3 | 345609
encode_nested_map | 100000 | 687.3 | 145490
decode_tags | 100000 | 191.4 | 522463
encode_tags | 100000 | 304.1 | 328875
decode_sequence_10 | 100000 | 342.7 | 291779
decode_indefinite_array | 100000 | 189.0 | 529229Interpretation notes
- Decode and encode throughput for small unsigned integers is the fastest path (single byte CBOR, trivial operations).
- Text string operations include UTF-8 validation, adding measurable overhead vs byte strings.
- The BLE map workload (4 key-value pairs) represents a realistic device command payload.
- Nested structures increase overhead proportionally to nesting depth.
- Tag decoding/encoding adds a header byte and recursive dispatch.
- Decoding a sequence of 10 items requires 10 individual decode calls.
- Indefinite-length arrays involve additional chunk parsing logic.
These host-side OTP benchmark results are useful for release-to-release regression tracking on comparable hosts. They are not ESP32 or AtomVM runtime performance measurements. ESP32 runtime performance should be measured separately on-device.
ESP-IDF validation
ESP-IDF validation confirms build compatibility for the tested ESP-IDF versions. Runtime performance and hardware behavior must be measured separately on physical devices.
- v5.4.3: passed
- v5.5.2: passed
Future physical hardware validation
Physical hardware-in-the-loop validation is intentionally out of scope for v0.1.1 and will be planned separately for a future release.
Warning
These are OTP host-side microbenchmarks. They are intended as reproducible baseline measurements, not ESP32 runtime performance guarantees.